mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.1 overview 1.1.1 overview the mn101e series of 8-bit single-chip microcompute rs (the memory expansion version of mn101c series) incorporate multiple types of peripheral functions. this chip series is well suited for automotive power window, camera, tv, cd, printer, telephone, home appliance, ppc, fax machine, music instrume nt and other applications. this lsi brings to embedded microcomputer applications flexible, optimized hardware configurations and a sim- ple efficient instruction set. mn101efa6/a5/a1/a0 has an internal 32 kb of rom and 1 kb of ram. periph- eral functions include 5 external in terrupts, including nmi, 8 timer counter s, 3 (mn101efa5/a0: 2) types of serial interfaces, a/d converter, watchdog timer and bu zzer output (mn101efa5/a0: no buzzer). the system configuration is suitable for system control microcontroller. with 2 oscillation systems (internal frequency: 16 mhz, crystal/ceramic frequency: max. 10 mhz) contained on the chip, the system clock can be switched to high- speed frequency input (normal mode) or pll input (pll mode). the system clock is generated by dividing the osc illation clock or pll clock. the best operation clock for the system can be selected by switching its frequency ratio by programming. high speed mode has normal mode which is based on the clock dividing fpll, (fpll is generated by original oscillation and pll), by 2 (fpll/2), and the double speed mode which is based on the clock not dividing fpll. a machine cycle (minimum instruction execution time) in normal mode is 200 ns when the original oscillation fosc is 10 mhz (pll is not used). a machine cycle in the double speed mode, in which the cpu operates on the same clock as the external clock, is 100 ns when fosc is 10 mhz. a machine cycle in the pll mode is 50 ns (max- imum). 1.1.2 product summary this manual describes the following model. table:1.1.1 product summary model rom size ram size classification capacitive touch detection circuit package MN101EFA6A 32 kb 1 kb flash eeprom version ? 44-pin qfp 48-pin tqfp mn101efa1a 32 kb 1 kb flash eeprom version - mn101efa5a 32 kb 1 kb flash eeprom version ? 32-pin ssop 32-pin tqfp mn101efa0a 32 kb 1 kb flash eeprom version -
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.2 hardware functions ? feature - rom capacity: 32 kb - ram capacity: 1 kb - package: mn101efa6/a1 44-pin qfp (10 mm ? 10 mm / 0.8 mm pitch) 48-pin tqfp (7 mm ? 7 mm / 0.5 mm pitch) mn101efa5/a0 32-pin tqfp (7 mm ? 7 mm / 0.8mm pitch) 32-pin ssop (6.1 mm ? 11 mm / 0.65mm pitch, halogen free) panasonic "halogen free" semiconductor products re fer to the products made of molding resin and interposer which conform to the following standards. - bromine : 900 ppm (maximum concentration value) - chlorine : 900 ppm (maximum concentration value) - bromine + chlorine : 1500 ppm (maximum concentration value) the above-mentioned standards are based on the numerical value described in iec61249-2-21. antimony and its compounds are not added intentionally. - machine cycle: 0.05 ? s / fs: 20 mhz (4.0 v to 5.5 v) - oscillation circuit: 2 channel oscillation circuit internal oscillation (frc): 16 mhz crystal/ceramic (fosc): maximum 10 mhz -clock multiplication circuit (pll circuit) pll circuit output clock (fpll): fosc multiplied by 2, 3, 4, 5, 6, 8, 10, 1/2 ? frc multiplication by 4, 5 enable -clock gear for system clock system clock (fs): fpll divided by 1, 2, 4, 16, 32, 64, 128 -clock gear for control clock of peripheral function control clock of peripheral function (fpll-div): stop or fpll divided by 1, 2, 4, 8, 16 - operation mode: normal mode halt mode stop mode (the operation clock can be switched in each mode.) - operating voltage: 4.0 v to 5.5 v
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e - operation ambient temperature: -40 ? c to +85 ? c - interrupt: mn101efa6: 27 levels mn101efa1: 23 levels mn101efa5: 25 levels mn101efa0: 21 levels - non-maskable interrupt and watchdog timer overflow interrupt - timer 0 interrupt - timer 1 interrupt - timer 2 interrupt - timer 6 interrupt - time base timer interrupt - timer 7 interrupt - timer 7 compare register 2 match interrupt - timer 9 overflow interrupt - timer 9 underflow interrupt - timer 9 compare register 2 match interrupt - serial interface 0 interrupt - serial interface 0 uart reception interrupt - serial interface 1 interrupt (mn101e fa5/a0 don't have this function) - serial interface 1 uart recep tion interrupt (mn101efa5/a0 don't have this function) - serial interface 4 interrupt - serial interface 4 stop condition interrupt - a/d conversion interrupt - irq0: edge selectable, noise filter connection available - irq1: edge selectable, noise filter connection available - irq2: edge selectable, noise filter c onnection available, both edges interrupt - irq3: edge selectable, noise filter c onnection available, both edges interrupt - irq4: edge selectable, noise filter connection av ailable, both edges interrupt, key scan interrupt - touch detect interrupt - touch detect error interrupt - touch round interrupt - touch data transmission interrupt (mn101efa1/a0 don't have this function) - timer counter: 8 timers - 8-bit timer for general use ? 3 sets
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e - 16-bit timer for general use ? 1 set - motor control 16-bit timer ? 1 set - 8-bit free-run timer ? 1 set - time base timer ? 1 set - baud rate timer ? 1 set timer 0 (8-bit timer for general use) - square wave output (timer pulse output) - added pulse (2-bit) type pwm output can be output to large current pin tm0iob - event count - simple pulse measurement - clock source fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-d iv/64, fpll-div/128, fs/2, fs/4, fs/8, external clock, timer a output timer 1 (8-bit timer for general use) - square wave output (timer pulse output) can be output to large current pin tm1iob - event count - 16-bit cascade connected (with timer 0) - clock source fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-d iv/64, fpll-div/128, fs/2, fs/4, fs/8, external clock, timer a output timer 2 (8-bit timer for general use) - square wave output (timer pulse output) - added pulse (2-bit) type pwm output can be output to large current pin tm2iob - event count - simple pulse measurement - 24-bit cascade connected (with timer 0 and timer 1) - clock source fpll-div, fpll-div/4, fpll-div/16, fpll-div/32, fpll-d iv/64, fpll-div/128, fs/2, fs/4, fs/8, external clock, timer a output timer 6 (8-bit free-run timer, time base timer) 8-bit free-run timer - clock source fpll-div, fpll-div/2 12 , fpll-div/2 13 , fs time base timer - interrupt generation cycle fpll-div/2 7 , fpll-div/2 8 , fpll-div/2 9 , fpll-div/2 10 , fpll-div/2 13 , fpll-div/2 15 timer 7 (16-bit timer for general use) - square wave output (timer pulse output) - high precision pwm output (cycle/duty continuous changeable) can be output to large current pin tm7iob - event count - input capture function (both edges can be operated) - clock source fpll-div, fpll-div/2, fpll-div/4, fp ll-div/16, fs, fs/2, fs/4, fs/16, timer a divided by 1, 2, 4, 16, external clock divided by 1, 2, 4, 16 timer 9 (motor control 16-bit timer) - square wave output (timer pulse output) - event count - complementary 3-phase pwm output can be ou tput to large current pin tm9od0 to tm9od5
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e (triangle wave and saw tooth wave are supported, dead time insertion available) - clock source fpll-div, fpll-div/2, fpll-div/4, fp ll-div/16, fs, fs/2, fs/4, fs/16, timer a divided by 1, 2, 4, 16, external clock divided by 1, 2, 4, 16 timer a (baud rate timer) - clock output for peripheral functions - clock source fpll-div, fpll-div/2, fpll-div/4, fpll-d iv/8, fpll-div/16, fpll-div/32, fs/2, fs/4 - watchdog timer time-out cycle can be selected from fs/2 16 , fs/2 18 , fs/2 20 on detection of 2 errors, forcibly hard reset inside lsi. operation start timing is selectable. (a t reset release or write to register) - buzzer output/ reverse buzzer output output frequency can be selected from fpll-div/2 9 , fpll-div/2 10 , fpll-div/2 11 , fpll-div/2 12 , fpll-div/2 13 , fpll-div/2 14 - a/d converter: 10-bit ? 12 channels (mn101efa6/a1) 10-bit ? 8 channels (mn101efa5/a0) - serial interface: 3 channels (mn101efa6/a1) 2 channels (mn101efa5/a0) serial 0: uart (full duplex)/ clock synchronous clock synchronous serial interface - transfer clock source fpll-div/2, fpll-div/4, fpll-div/16, fpll-div/64, fs/2, fs/4, timer 0 to 2 or timer a divided by 1, 2, 4, 8, 16, external clock - msb/lsb can be selected as th e first bit to be transferred, arbitrary sizes of 1 to 8 bits are selectable. - sequence transmission, recep tion or both are available full duplex uart - baud rate timer, selected from timer 0 to 2 or timer a - parity check, overrun erro r/ framing error detection - transfer size 7 to 8 bits can be selected serial 1: uart (full duplex)/ clock synchr onous (mn101efa5/a0 don't have this function) clock synchronous serial interface - transfer clock source fpll-div/2, fpll-div/4, fpll-div/16, fpll-div/64, fs/2, fs/4, timer 0 to 2 or timer a divided by 1, 2, 4, 8, 16, external clock - msb/lsb can be selected as th e first bit to be transferred, arbitrary sizes of 1 to 8 bits are selectable. - sequence transmission, recep tion or both are available. full duplex uart - baud rate timer, selected from timer 0 to 2 or timer a - parity check, overrun erro r/ framing error detection -transfer size 7 to 8 bits can be selected serial 4: multi master iic/ clock synchronous clock synchronous serial interface - transfer clock source fpll-div/2, fpll-div/4, fpll-div/16, fpll-div/32, fs/2, fs/4,
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e timer 0 to 2 or timer a divided by 1, 2, 4, 8, 16, external clock - msb/lsb can be selected as th e first bit to be transferred, arbitrary sizes of 1 to 8 bits are selectable. - sequence transmission, recep tion or both are available. multi master iic - 7-bit slave address is settable. - general call communication mode is supported. - automatic reset: power detection level: 4.3 v (at rising), 4.2 v (at falling) - led driver: 16 pins (port 0 or port a) - touch sensor timer: 1 unit/ 8 channels (mn101efa1/a0 don't have this function) - ports (mn101efa6/a1) i/o ports 36 pins serial interface pins 12 pins timer i/o 15 pins buzzer output pins 2 pins a/d input pins 12 pins external interrupt pins 6 pins led (large current) driver 16 pins (port 0 or port a) touch sensor input pins 8 pins (mn101efa1 does not have this function) touch sensor resistor connect pins 2 pins (mn101efa1 does not have this function) high-speed oscillation 2 pins special pins 8 pins operation mode input pins 3 pins reset input pin 1 pin analog reference voltage input pin 1 pin power pins 3 pins - ports (mn101efa5/a0) i/o ports 24 pins serial interface pins 9 pins timer i/o 9 pins a/d input pins 8 pins external interrupt pins 5 pins led (large current) driver 16 pins (port 0 or port a) touch sensor input pins 8 pins (mn101efa0 does not have this function) touch sensor resistor connect pins 2 pins (mn101efa0 does not have this function) high-speed oscillation 2 pins special pins 8 pins operation mode input pins 3 pins reset input pin 1 pin analog reference voltage input pin 1 pin
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.3 pin description 1.3.1 pin configuration figure:1.3.1 pin configuration (mn101efa6 44-pin qfp) mn101efa6 44pin qfp (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14 17 16 19 18 20 21 22 30 29 28 27 26 25 24 23 44 43 42 41 40 39 38 37 36 35 34 31 33 32 pa4/an4/key4/tsin4/led12/tm0ioa pa3/an3/key3/tsin3/led11/sbo0a/txd0a pa2/an2/key2/tsin2/led10/sbi0a/rxd0a pa1/an1/key1/tsin1/led9/sbt0a pa0/an0/key0/tsin0/led8/irq4b p45/an8 p44/an9/tm9ioc p43/an10/tm7ioc p42/an11/tm2ioc p41/tsop/tm1ioc p40/tsrc/tm0ioc ocd_data/p30 ocd_clk/p31 mmod nrst/p27 t m9ioa/tm9od0/led0/p00 t m7iob/tm9od1/led1/p01 t m2iob/tm9od2/led2/p02 t m1iob/tm9od3/led3/p03 t m0iob/tm9od4/led4/p04 sbi4/tm9od5/led5/p05 sda4/sbo4/led6/p06 p36/sbt1 p35/tm2ioa/sbi1/rxd1 p34/sbo1/txd1 p33/nbuzzer p32/buzzer p24/irq4a p23/irq3/sbo0b/txd0b p22/irq2/sbi0b/rxd0b p21/irq1/sbt0b p20/irq0 p07/led7/sbt4/scl4 tm1ioa/led13/tsin5/key5/an5/pa5 tm7ioa/led14/tsin6/key6/an6/pa6 led15/tsin7/key7/an7/pa7 vref+ vdd5 atrst vdd18 dmod osc2/p26 osc1/p25 vss
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e figure:1.3.2 pin configuration (mn101efa6 48-pin tqfp) 1 2 3 4 5 6 7 9 10 11 12 13 14 16 15 19 18 21 20 22 23 24 32 31 30 29 28 27 26 25 48 47 46 45 44 43 42 41 40 39 38 33 35 34 8 17 36 37 mn101efa6 48pin tqfp (top view) tm1ioa/led13/tsin5/key5/an5/pa5 tm7ioa/led14/tsin6/key6/an6/pa6 led15/tsin7/key7/an7/pa7 vref+ vdd5 atrst vdd18 dmod n.c. osc2/p26 osc1/p25 vss ocd_data/p30 ocd_clk/p31 mmod nrst/p27 n.c. t m9ioa/tm9od0/led0/p00 t m7iob/tm9od1/led1/p01 t m2iob/tm9od2/led2/p02 t m1iob/tm9od3/led3/p03 t m0iob/tm9od4/led4/p04 sbi4/tm9od5/led5/p05 sda4/sbo4/led6/p06 p36/sbt1 p40/tsrc/tm0ioc p35/tm2ioa/sbi1/rxd1 p34/sbo1/txd1 p33/nbuzzer p32/buzzer p24/irq4a p23/irq3/sbo0b/txd0b p22/irq2/sbi0b/rxd0b p21/irq1/sbt0b p20/irq0 p07/led7/sbt4/scl4 pa4/an4/key4/tsin4/led12/tm0ioa pa3/an3/key3/tsin3/led11/sbo0a/txd0a pa2/an2/key2/tsin2/led10/sbi0a/rxd0a pa1/an1/key1/tsin1/led9/sbt0a pa0/an0/key0/tsin0/led8/irq4b p45/an8 p44/an9/tm9ioc p43/an10/tm7ioc p42/an11/tm2ioc n.c. n.c. p41/tsop/tm1ioc
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e figure:1.3.3 pin configuration (mn101efa1 44-pin qfp) mn101efa1 44pin qfp (top view) 1 2 3 4 5 6 7 8 9 10 11 12 13 15 14 17 16 19 18 20 21 22 30 29 28 27 26 25 24 23 44 43 42 41 40 39 38 37 36 35 34 31 33 32 pa4/an4/key4/led12/tm0ioa pa3/an3/key3/led11/sbo0a/txd0a pa2/an2/key2/led10/sbi0a/rxd0a pa1/an1/key1/led9/sbt0a pa0/an0/key0/led8/irq4b p45/an8 p44/an9/tm9ioc p43/an10/tm7ioc p42/an11/tm2ioc p41/tm1ioc p40/tm0ioc ocd_data/p30 ocd_clk/p31 mmod nrst/p27 tm9ioa/tm9od0/led0/p00 tm7iob/tm9od1/led1/p01 tm2iob/tm9od2/led2/p02 tm1iob/tm9od3/led3/p03 tm0iob/tm9od4/led4/p04 sbi4/tm9od5/led5/p05 sda4/sbo4/led6/p06 p36/sbt1 p35/tm2ioa/sbi1/rxd1 p34/sbo1/txd1 p33/nbuzzer p32/buzzer p24/irq4a p23/irq3/sbo0b/txd0b p22/irq2/sbi0b/rxd0b p21/irq1/sbt0b p20/irq0 p07/led7/sbt4/scl4 tm1ioa/led13/key5/an5/pa5 tm7ioa/led14/key6/an6/pa6 led15/key7/an7/pa7 vref+ vdd5 atrst vdd18 dmod osc2/p26 osc1/p25 vss
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e figure:1.3.4 pin configuration (mn101efa1 48-pin tqfp) 1 2 3 4 5 6 7 9 10 11 12 13 14 16 15 19 18 21 20 22 23 24 32 31 30 29 28 27 26 25 48 47 46 45 44 43 42 41 40 39 38 33 35 34 8 17 36 37 mn101efa1 48pin tqfp (top view) tm1ioa/led13/key5/an5/pa5 tm7ioa/led14/key6/an6/pa6 led15/key7/an7/pa7 vref+ vdd5 atrst vdd18 dmod n.c. osc2/p26 osc1/p25 vss ocd_data/p30 ocd_clk/p31 mmod nrst/p27 n.c. tm9ioa/tm9od0/led0/p00 tm7iob/tm9od1/led1/p01 tm2iob/tm9od2/led2/p02 tm1iob/tm9od3/led3/p03 tm0iob/tm9od4/led4/p04 sbi4/tm9od5/led5/p05 sda4/sbo4/led6/p06 p36/sbt1 p35/tm2ioa/sbi1/rxd1 p34/sbo1/txd1 p33/nbuzzer p32/buzzer p24/irq4a p23/irq3/sbo0b/txd0b p22/irq2/sbi0b/rxd0b p21/irq1/sbt0b p20/irq0 p07/led7/sbt4/scl4 pa4/an4/key4/led12/tm0ioa pa3/an3/key3/led11/sbo0a/txd0a pa2/an2/key2/led10/sbi0a/rxd0a pa1/an1/key1/led9/sbt0a pa0/an0/key0/led8/irq4b p45/an8 p44/an9/tm9ioc p43/an10/tm7ioc p42/an11/tm2ioc n.c. n.c. p41/tm1ioc p40/tm0ioc
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e figure:1.3.5 pin configuration (mn101efa5 32-pin ssop) figure:1.3.6 pin configuration (mn101efa5 32-pin tqfp) 1 2 3 4 5 6 7 9 10 11 12 16 28 27 26 25 24 23 22 21 29 31 30 8 32 mn101efa5 32pin ssop (top view) tm0ioa/led12/tsin4/key4/an4/pa4 tm1ioa/led13/tsin5/key5/an5/pa5 tm7ioa/led14/tsin6/key6/an6/pa6 led15/tsin7/key7/an7/pa7 vref+ vdd5 atrst dmod vdd18 osc2/p26 osc1/p25 vss 13 14 15 ocd_data/p30 ocd_clk/p31 mmod nrst/p27 pa2/an2/key2/tsin2/led10/sbi0a/rxd0a pa3/an3/key3/tsin3/led11/sbo0a/txdoa pa1/an1/key1/tsin1/led9/sbt0a pa0/an0/key0/tsin0/led8/irq4b p23/irq3/tsrc/sbo0b/txd0b p22/irq2/tsop/sbi0b/rxd0b p21/irq1/sbt0b p20/irq0 p07/led7/sbt4/scl4 p06/led6/sbo4/sda4 p05/led5/tm9od5/sbi4 p04/led4/tm9od4/tm0iob 20 19 18 17 p03/led3/tm9od3/tm1iob p02/led2/tm9od2/tm2iob p01/led1/tm9od1/tm7iob p00/led0/tm9od0/tm9ioa mn101efa5 32pin tqfp (top view) 1 2 3 4 5 6 7 8 32 31 30 29 28 27 26 25 21 20 19 18 22 24 23 17 9 10 12 11 14 13 16 15 led15/tsin7/key7/an7/pa7 vref+ vdd5 atrst vdd18 dmod osc2/p26 osc1/p25 ocd_data/p30 ocd_clk/p31 mmod vss nrst/p27 tm9ioa/tm9od0/led0/p00 tm7iob/tm9od1/led1/p01 tm2iob/tm9od2/led2/p02 p22/irq2/tsop/sbi0b/rxd0b p21/irq1/sbt0b p20/irq0 p07/led7/sbt4/scl4 p03/led3/tm9od3/tm1iob p04/led4/tm9od4/tm0iob p05/led5/tm9od5/sbi4 p06/led6/sbo4/sda4 p23/irq3/tsrc/sbo0b/txd0b pa4/an4/key4/tsin4/led12/tm0ioa pa3/an3/key3/tsin3/led11/sbo0a/txd0a pa2/an2/key2/tsin2/led10/sbi0a/rxd0a pa1/an1/key1/tsin1/led9/sbt0a pa0/an0/key0/tsin0/led8/irq4b pa5/an5/key5/tsin5/led13/tm1ioa pa6/an6/key6/tsin6/led14/tm7ioa
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e figure:1.3.7 pin configuration (mn101efa0 32-pin ssop) figure:1.3.8 pin configuration (mn101efa0 32-pin tqfp) 1 2 3 4 5 6 7 9 10 11 12 16 28 27 26 25 24 23 22 21 29 31 30 8 32 mn101efa0 32pin ssop (top view) tm0ioa/led12/key4/an4/pa4 tm1ioa/led13/key5/an5/pa5 tm7ioa/led14/key6/an6/pa6 led15/key7/an7/pa7 vref+ vdd5 atrst dmod vdd18 osc2/p26 osc1/p25 vss 13 14 15 ocd_data/p30 ocd_clk/p31 mmod nrst/p27 pa2/an2/key2/led10/sbi0a/rxd0a pa3/an3/key3/led11/sbo0a/txdoa pa1/an1/key1/led9/sbt0a pa0/an0/key0/led8/irq4b p23/irq3/sbo0b/txd0b p22/irq2/sbi0b/rxd0b p21/irq1/sbt0b p20/irq0 p07/led7/sbt4/scl4 p06/led6/sbo4/sda4 p05/led5/tm9od5/sbi4 p04/led4/tm9od4/tm0iob 20 19 18 17 p03/led3/tm9od3/tm1iob p02/led2/tm9od2/tm2iob p01/led1/tm9od1/tm7iob p00/led0/tm9od0/tm9ioa mn101efa0 32pin tqfp (top view) 1 2 3 4 5 6 7 8 32 31 30 29 28 27 26 25 21 20 19 18 22 24 23 17 9 10 12 11 14 13 16 15 led15/key7/an7/pa7 vref+ vdd5 atrst vdd18 dmod osc2/p26 osc1/p25 ocd_data/p30 ocd_clk/p31 mmod vss nrst/p27 tm9ioa/tm9od0/led0/p00 tm7iob/tm9od1/led1/p01 tm2iob/tm9od2/led2/p02 p22/irq2/sbi0b/rxd0b p21/irq1/sbt0b p20/irq0 p07/led7/sbt4/scl4 p03/led3/tm9od3/tm1iob p04/led4/tm9od4/tm0iob p05/led5/tm9od5/sbi4 p06/led6/sbo4/sda4 p23/irq3/sbo0b/txd0b pa4/an4/key4/led12/tm0ioa pa3/an3/key3/led11/sbo0a/txd0a pa2/an2/key2/led10/sbi0a/rxd0a pa1/an1/key1/led9/sbt0a pa0/an0/key0/led8/irq4b pa5/an5/key5/led13/tm1ioa pa6/an6/key6/led14/tm7ioa
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.3.2 pin specification table remarks ? : with function -: without function pins mn101 efa6 mn101 efa1 mn101 efa5 mn101 efa0 special functions i/o direction control pin control functions description p00 ???? led0 tm9ioa in/out p0dir0 p0plu0 led0:led driving pin 0 tm9ioa:timer 9 input/output ???? tm9od0 tm9od0:timer 9 output p01 ???? led1 tm7iob in/out p0dir1 p0plu1 led1:led driving pin 1 tm7iob:timer 7 input/output ???? tm9od1 tm9od1:timer 9 output p02 ???? led2 tm2iob in/out p0dir2 p0plu2 led2:led driving pin 2 tm2iob:timer 2 input/output ???? tm9od2 tm9od2:timer 9 output p03 ???? led3 tm1iob in/out p0dir3 p0plu3 led3:led driving pin 3 tm1iob:timer 1 input/output ???? tm9od3 tm9od3:timer 9 output p04 ???? led4 tm0iob in/out p0dir4 p0plu4 led4:led driving pin 4 tm0iob:timer 0 input/output ???? tm9od4 tm9od4:timer 9 output p05 ???? led5 sbi4 in/out p0dir5 p0plu5 led5:led driving pin 5 sbi4:serial 4 data input ???? tm9od5 tm9od5:timer 9 output p06 ???? led6 sbo4 in/out p0dir6 p0plu6 led6:led driving pin 6 sbo4:serial 4 data input/output ???? sda4 sda4:multi-master iic4 data input/output p07 ???? led7 sbt4 in/out p0dir7 p0plu7 led7:led driving pin 7 sbt4:serial 4 clock input/output ???? scl4 scl4:multi-master iic4 clock input/output p20 ???? irq0 in/out p2dir0 p2plu0 irq0:external interrupt 0 p21 ???? irq1 sbt0b in/out p2dir1 p2plu1 irq1:external interrupt 1 sbt0b:serial 0 clock input/output p22 ???? irq2 sbi0b in/out p2dir2 p2plu2 irq2:external interrupt 2 sbi0b:serial 0 data input ???? rxd0b rxd0b:uart0 data input -- ? - tsop tsop:touch sensor output p23 ???? irq3 sbo0b in/out p2dir3 p2plu3 irq3:external interrupt 3 sbo0b:serial 0 data input/output ???? txd0b txd0b:uart0 data input/output -- ? - tsrc tsrc:touch sensor rc connect p24 ?? - - irq4a in/out p2dir4 p2plu4 irq4a:external interrupt 4 p25 ???? osc1 in/out p2dir5 p2plu5 osc1:seramic/crystal high-speed clock input p26 ???? osc2 in/out p2dir6 p2plu6 osc2:seramic /crystal high-speed clock output p27 ???? nrst in/out - - nrst:reset p30 ???? ocd_data in/out p3dir0 p3plu0 ocd_data:on-board programmer data pin p31 ???? ocd_clk in/out p3dir1 p3plu1 ocd_clk:on-board programmer clock supply pin p32 ?? - - buzzer in/out p3dir2 p3plu2 buzzer:buzzer output p33 ?? - - nbuzzer in/out p3dir3 p3plu3 nbuzzer:buzzer reverse output p34 ?? - - sbo1 txd1 in/out p3dir4 p3plu4 sbo1:serial 1 data input/output txd1:uart1 data input/output p35 ?? - - tm2ioa sbi1 in/out p3dir5 p3plu5 tm2ioa:timer 2 input/output sbi1:serial 1 data input ?? - - rxd1 rxd1:uart1 data input p36 ?? - - sbt1 in/out p3dir6 p3plu6 sbt1:serial 1 clock input/output p40 ?? - - tm0ioc in/out p4dir0 p4plud0 tm0ioc:timer 0 input/output ? - - - tsrc tsrc:touch sensor rc connect p41 ?? - - tm1ioc in/out p4dir1 p4plud1 tm1ioc:timer 1 input/output ? - - - tsop tsop:touch sensor output p42 ?? - - an11 tm2ioc in/out p4dir2 p4plud2 an11:analog 11 input tm2ioc:timer 2 input/output p43 ?? - - an10 tm7ioc in/out p4dir3 p4plud3 an10:analog 10 input tm7ioc:timer 7 input/output p44 ?? - - an9 tm9ioc in/out p4dir4 p4plud4 an9:analog 9 input tm9ioc:timer 9 input/output p45 ?? - - an8 in/out p4dir5 p4plud5 an8:analog 8 input pa0 ???? an0 key0 in/out padir0 paplu0 an0:analog 0 input key0:key interrupt 0 ???? irq4b led8 irq4b:external interrupt 4 led8:led drive 8 ? - ? - tsin0 tsin0:touch sensor input 0 pa1 ???? an1 key1 in/out padir1 paplu1 an1:analog 1 input key1:key interrupt 1 ???? sbt0a led9 sbt0a:serial 0 clock input/output led9:led drive 9 ? - ? - tsin1 tsin1:touch sensor input 1
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e pa2 ???? an2 key2 in/out padir2 paplu2 an2:analog 2 input key2:key interrupt 2 ???? sbi0a rxd0a sbi0a:serial 0 data input rxd0a:uart0 data input ???? led10 led10:led drive 10 ? - ? - tsin2 tsin2:touch sensor input 2 pa3 ???? an3 key3 in/out padir3 paplu3 an3:analog 3 input key3:key interrupt 3 ???? sbo0a txd0a sbo0a:serial 0 data input/output txd0a:uart0 data input/output ???? led11 led11:led drive 11 ? - ? - tsin3 tsin3:touch sensor input 3 pa4 ???? an4 key4 in/out padir4 paplu4 an4:analog 4 input key4:key interrupt 4 ???? tm0ioa led12 tm0ioa:timer 0 input/output led12:led drive 12 ? - ? - tsin4 tsin4:touch sensor input 4 pa5 ???? an5 key5 in/out padir5 paplu5 an5:analog 5 input key5:key interrupt 5 ???? tm1ioa led13 tm1ioa:timer 1 input/output led13:led drive 13 ? - ? - tsin5 tsin5:touch sensor input 5 pa6 ???? an6 key6 in/out padir6 paplu6 an6:analog 6 input key6:key interrupt 6 ???? tm7ioa led14 tm7ioa:timer 7 input/output led14:led drive 14 ? - ? - tsin6 tsin6:touch sensor input 6 pa7 ???? an7 key7 in/out padir7 paplu7 an7:analog 7 input key7:key interrupt 7 ???? led15 led15:led drive 15 ? - ? - tsin7 tsin7:touch sensor input 7 table remarks ? : with function -: without function pins mn101 efa6 mn101 efa1 mn101 efa5 mn101 efa0 special functions i/o direction control pin control functions description
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.3.3 pin functions table remarks -: without function pins mn101ef a6/a1 mn101ef a5/a0 i/o function description 48pin tqfp 44pin qfp 32pin ssop 32pin tqfp vdd55563- power connect pins apply 4.0 v to 5.5 v to vdd5 and 0 v to vss connect 0.1 ? f + 1 ? f or larger bypass capacitor for internal power stabilization. vss 12 11 12 9 - vdd187785- internal power output pin this pin is output 1.8 v from internal power circuit. don?t use the power supply to external device. for internal power circuit output sta- bility, connect at least 0.1 ? f + 1 ? f one bypass capacitor between vdd18 and vss. osc1 11 10 11 8 input high speed operation clock input pin connect these oscillation pins to ceramic or crystal ocsillators for high-frequency clock operation. if the clock is an external input, connect it to osc1 and leave osc2 open. the chip will not operate with an external clock when using stop mode. osc2 10 9 10 7 output high speed operation clock output pin nrst 16 15 16 13 i/o reset pins [active low] this pin resets th e chip when power is turned on, is allocated as p27 and contains an internal pull-up resistor (typ. 50 k ? ). setting this pin low initialize the internal state of the device. thereafter, setting the input to high releases the reset. the hardware waits for the system clock to stabiliz e, then processes the reset inter- rupt. if a capacitor is to be inserted between nrst and vss, it is recom- mended that a discharge diode be placed between nrst and vdd5. atrst6674inputauto reset setting pin input "high" to enable auto reset function and ?low? to disable this function p00 18 16 17 14 i/o i/o port 0 8-bit cmos tri-state i/o port. each bit can be set individually as either an input or output by p0dir register. a pull-up resistor for each bit can be selected individually by p0plu register. direct led drive is available at output. at reset, the input mode is selected and pull-up resistor is disabled (high impedance). p01 19171815 p02 20181916 p03 21192017 p04 22202118 p05 23212219 p06 24222320 p07 25232421 p20 26 24 25 22 i/o i/o port 2 7-bit cmos tri-state i/o port. each bit can be set individually as either an input or output by p2dir register. a pull-up resistor for each bit can be selected individually by p2plu register. at reset, the input mode is selected and pull-up resistor is disabled (high impedance) p21 27252623 p22 28262724 p23 29272825 p24 30 28 - - p25 11 10 11 8 p26 10 9 10 7 p27 16 15 16 13 input input port 2 p27 has an n-channel open-drain configuration. p30 13 12 13 10 i/o i/o port 3 7-bit cmos tri-state i/o port. each bit can be set individually as either an input or output by p3dir register. a pull-up resistor for each bit can be selected individually by p3plu register. at reset, the input mode is selected and pull-up resistor is disabled (high impedance). p31 14131411 p32 31 29 - - p33 32 30 - - p34 33 31 - - p35 34 32 - - p36 35 33 - - p40 36 34 - - i/o i/o port 4 6-bit cmos tri-state i/o port. each bit can be set individually as either an input or output by p4dir register. a pull-up /pull-down resistor for each bit can be selected individually by p4plud register. a pull-up/down resistor connection for each port can be selected individually in selud register. a pull-up/pull down can not be mixed. at reset, the input mode is selected and pull-up resistor is disabled (high impedance). p41 37 35 - - p42 40 36 - - p43 41 37 - - p44 42 38 - - p45 43 39 - -
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e pa0 44 40 29 26 i/o i/o port 0 8-bit cmos tri-state i/o port. each bit can be set individually as either an input or output by p0dir register. a pull-up resistor for each bit can be selected individually by p0plu register. direct led drive is available at output. at reset, the input mode is selected and pull-up resistor is disabled (high impedance). pa1 45413027 pa2 46423128 pa3 47433229 pa4 48 44 1 30 pa5 11231 pa6 22332 pa7 3341 sbo0a 47 43 32 29 output serial interface transmission data output pins transmission data output pins for serial interface 0,1,4. the output configuration, either coms push-pull or nch open-drain can be selected in p0odc, p2 odc, p3odc and paodc registers. pull-up resistor can be selected in p0plu, p2plu, p3plu and paplu registers. select output mo de in p0dir, p2dir, p3dir and padir registers and set serial data output mode in serial mode reg- ister 1 (sc0md1, sc1md1, sc4md1). these can be used as normal i/o pins when serial interface is not used. sbo0b29272825 sbo1 33 31 - - sbo4 24 22 23 20 sbi0a 46 42 31 28 input serial interface reception data input pins reception data input pins for serial interface 0,1,4. pull-up resistor can be selected in p0plu, p2plu, p3pluand paplu registers. select the output mode in p0di r, p2dir, p3dir and padir regis- ters and select serial data input mode in serial mode register 1 (sc0md1, sc1md1, sc4md1). these can be used as normal i/o pins when serial interface is not used. sbi0b28262724 sbi1 34 32 - - sbi4 23 21 22 19 sbt0a 45 41 30 27 i/o serial interface clock i/o pins clock i/o pins for serial interface 0,1,4. the output configuration, either coms push-pull or nch open-drain can be selected in p0odc, p2 odc, p3odc and paodc registers. pull-up resistor can be selected in p0plu, p2plu, p3plu and paplu registers. select clock i/o in p0dir, p2dir, p3dir and padir registers and serial mode register 1 (sc0md1, sc1md1, sc4md1) with the com- munication mode. these can be used as normal i/o pins when serial interface is not used. sbt0b27252623 sbt1 35 33 - - sbt4 25 23 24 21 txd0a 47 43 32 29 output uart transmission data output pins in serial interface 0,1 in uart mode, this pin is configured as the transmission data output pin. the output configuration, either coms push-pull or nch open-drain can be selected in p2odc, p3odc and paodc registers. pull-up resistor can be selected by p2plu, p3plu and paplu reg- isters. select the output mode in p2dir, p3dir an d padir registers and select serial data output mode in serial mode register 1 (sc0md1, sc1md1). these can be used as normal i/o pins when serial interface is not used. txd0b29272825 txd1 33 31 - - rxd0a 46 42 31 28 input uart reception data input pins in serial interface 0,1 in uart mode, this pin is configured as the reception data input pin. pull-up resistor can be selected in p2plu, p3plu and paplu regis- ters. select the input mode in p2dir, p3dir and padir registers and select serial input in serial mode register 1 (sc0md1, sc1md1). these can be used as normal i/o pins when serial interface is not used. rxd0 28 26 27 24 rxd1 34 32 - - sda4 24 22 23 20 i/o iic data i/o pins in serial interface 4 in iic mode, this pin is configured as the data i/o pin. for the output configuration, select nch open-drain in p0odc regis- ter and set pull-up resistor in p0plu register. select the output mode in p0dir register and select serial data i/o mode by serial mode reg- ister 1 (sc4md1). these can be used as normal i/o pin when serial interface is not used. scl4 25 23 24 21 i/o iic clock i/o pins in serial interface 4 in iic mode, this pin is configured as the clock i/ o pin. for the output configuration, select nch open-drain in p0odc regis- ter and set pull-up resistor by p0plu register. select the output mode at p0dir register and select serial clock i/o mode in serial mode register 1 (sc4md1). these can be used as normal i/o pin when serial interface is not used table remarks -: without function pins mn101ef a6/a1 mn101ef a5/a0 i/o function description 48pin tqfp 44pin qfp 32pin ssop 32pin tqfp
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e tm0ioa 48 44 1 30 i/o timer i/o pins event counter clock input pin, timer output and pwm signal output pin for 8-bit timer 0 to 2. to use this pin as event clock input, configure it as input by p0dir register, p3dir register, p4dir regi ster and padir register. in the input mode, pull-up resistor can be selected in p0plu, p3plu, p4plu and paplu registers. for timer output, pwm signal output , select the special function pin in p0omd, p3omd, p4omd and paomd registers, and set to the output mode in p0dir, p3di r, p4dir and padir registers. these can be used as normal i/o pins when timer i/o pin is not used. tm0iob 22 20 21 18 tm0ioc 36 34 - - tm1ioa 1 1 2 31 tm1iob 21 19 20 17 tm1ioc 37 35 - - tm2ioa 34 32 - - tm2iob 20 18 19 16 tm2ioc 40 36 - - buzzer 31 29 - - output buzzer output pins piezoelectric buzzer driving pin. buzzer output is available to port 3. the driving frequency can be set in dlyctr register. in order to select buzzer output to port 3, select the special function pin in p3omd register, and set p3dir register to the output mode. at the same time, select buzzer output in oscillation stabilization wait control register (dlyctr). these can be used as normal i/o pins when buzzer output is not used. nbuzzer 32 30 - - tm7ioa 2 2 2 32 i/o timer i/o pins event counter clock in put pin, timer output and pwm signal output pin for 16-bit timer7 and 9. to use this pin as event clock input, configure it as input with p0dir, p4dir and padir registers. in the input mode, pull-up resistor can be selected by p0plu, p4plu and paplu registers. for timer output, pwm signal output , select the special function pin in p0omd, p4omd and paomd registers, and set to the output mode in p0dir, p4dir and padir registers. these can be used as normal i/o pins when not used as timer i/o pins. tm7iob 19 17 18 15 tm7ioc 41 37 - - tm9ioa 18 16 17 14 tm9ioc 42 38 - - tm9od0 18 16 17 14 output timer pwm output pwm signal output pin for 16-bit timer 9. select the special function pin in p0omd register, and set to the out- put mode in p0dir register. these can be used as normal i/o pins when not used as timer i/o pins. tm9od1 19 17 18 15 tm9od2 20 18 19 16 tm9od3 21 19 20 17 tm9od4 22 20 21 18 tm9od5 23 21 22 19 vref+4452- a/d reference voltage input pin reference power supply pin for a/d converter. normally, the values of v ref+ = v dd5 is used. an0 44 40 29 26 input analog input pins analog input pins for 12-channel, 10-bit a/d converter. select the analog input by paimd register. when not used for analog input, these pins can be used as normal input pins. an1 45413027 an2 46423128 an3 47433229 an4 48 44 1 30 an5 11231 an6 22332 an7 3341 an8 43 39 - - an9 42 38 - - an10 41 37 - - an11 40 36 - - irq0 26 24 25 22 input external interrupt external interrupt input pins. select the external interrupt input enable by irqcnt register. the valid edge for irq0 to 4 can be selected with irqnicr register. irq2 to 4 can be set at both edges at pin voltage level. when not used for interrupts, these can be used as normal input pins. irq1 27 25 26 23 irq2 28 26 27 24 irq3 29 27 28 25 irq4a 30 28 - - irq4b 44 40 29 26 table remarks -: without function pins mn101ef a6/a1 mn101ef a5/a0 i/o function description 48pin tqfp 44pin qfp 32pin ssop 32pin tqfp
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e .. for the mmod setup in rewriting the flash memo ry, refer to [chapter 16 16.4 user mode microcontroller rewriting], [ch apter 16 16.5 boot mode microcontroller rewriting], [chap- ter 16 16.6 appendix]. .. key0 44 40 29 26 input key interrupt input pins input pins for key interrupt based on or condition result of pin inputs. these can be set to key input pins by 1-bit with key interrupt control register (keyt3_1imd). when not used for key input, these pins can be used as normal i/o pins. key1 45 41 30 27 key2 46 42 31 28 key3 47 43 32 29 key4 48 44 1 30 key5 1 1 2 31 key6 2 2 3 32 key7 3 3 4 1 led0 18 16 17 14 output led drive pins large current output pins. select the large current output by p0led and paled registers. when not used for led output, these pins can be used as normal i/o pins. led1 19 17 18 15 led2 20 18 19 16 led3 21 19 20 17 led4 22 20 21 18 led5 23 21 22 19 led6 24 22 23 20 led7 25 23 24 21 led8 44 40 29 26 led9 45 41 30 27 led1046423128 led1147433229 led12 48 44 1 30 led1311231 led1422332 led153341 dmod9896inputmode switch input pins set always to v dd5 . mmod 15 14 15 12 input rom area switch input pins at start set always to v ss . tsin0 44 40 29 26 input touch sensor input pins these pins are not equipped in mn101efa1 and mn101efa0. input pins for touch sensor timer of 8 channels. set "used" to corresponding channel by tstchsel register. this setup is available regardless of the setting of port control regis- ters. these can be used as normal i/o pins when touch sensor timer is not used. tsin145413027 tsin246423128 tsin347433229 tsin4 48 44 1 30 tsin511231 tsin622332 tsin73341 tsrc 36 34 28 25 input touch sensor resistor connect pins. these pins are not equipped in mn101efa1 and mn101efa0. these are used in the following cases. 1. external resistor connection for touch sensor timer set both tsmd and rsmd of tstmd register to ?1?. 2. the capacitor/resistor connection for touch sensor using a/d converter set tsadcnt register. this setup is available regardless of the setting of port control regis- ters. these can be used as normal i/o pins when touch sensor timer is not used. tsop 37 35 27 24 output table remarks -: without function pins mn101ef a6/a1 mn101ef a5/a0 i/o function description 48pin tqfp 44pin qfp 32pin ssop 32pin tqfp
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.4 block diagram 1.4.1 block diagram figure:1.4.1 block diagram * varies depending on models. refer to [chapter 1 1.1.2 product summar y] and [chapter 1 1.3.3 pin functions]. cpu mn101e internal high-speed oscillator circuit crystal/ceramic high-speed oscillator circuit rom 32 kb ram 1 kb 8-bit timer 0 8-bit timer 1 8-bit timer 2 time base timer 6 serial interface 1 watchdog timer buzzer a/d converter serial interface 0 tm7iob,tm9od1,led1,p01 tm2iob,tm9od2,led2,p02 tm1iob,tm9od3,led3,p03 tm0iob,tm9od4,led4,p04 sbi4,tm9od5,led5,p05 sbo4,sda4,led6,p06 sbt4,scl4,led7,p07 tm9ioa,tm9od0,led0,p00 sbt0b,irq1,p21 rxd0b,sbi0b,irq2,p22 txd0b,sbo0b,irq3,p23 irq4a,p24 irq0,p20 nbuzzer,p33 txd1,sbo1,p34 tm2ioa,rxd1,sbi1,p35 sbt1,p36 ocd_data,p30 ocd_clk,p31 buzzer,p32 p42,an11,tm2ioc p41,tm1ioc,tsop osc1,p25 osc2,p26 mmod atrst vref+ osc1,p25 touch sensor timer vss motor control timer 8-bit timer a serial interface 4 pa6,an6,key6,tsin6,led14,tm7ioa pa5,an5,key5,tsin5,led13,tm1ioa pa4,an4,key4,tsin4,led12,tm0ioa pa3,an3,key3,tsin3,led11,sbo0a,txd0a pa2,an2,key2,tsin2,led10,sbi0a,rxd0a pa1,an1,key1,tsin1,led9,sbt0a pa7,an7,key7,tsin7,led15 pa0,an0,key0,tsin0,led8,irq4b p40,tm0ioc,tsrc external interrupt vdd5 pll 16-bit timer 7 vdd18 osc2,p26 nrst,p27 p43,an10,tm7ioc p44,an9,tm9ioc p45,an8 dmod port 3 port a port 4 port 2 port 0
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.5 electrical characteristics this lsi manual describes standard specifications. when using this lsi, consult our sales offices for the product specifications. structure cmos integrated circuit application general-purpose function cmos 8-bit single chip microcomputer
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.5.1 absolute maximum ratings figure:1.5.1 capacitor connec tion between vdd18 and vss pins a. absolute maximum ratings *2 *3 *4 v ss = 0 v parameter symbol rating unit a1 power supply voltage v dd5 -0.3 to +7.0 v a2 power supply voltage v dd18 -0.3 to +2.5 a3 input pin voltage v i -0.3 to v dd5 +0.3 (upper limit: 7.0) a4 output pin voltage v o -0.3 to v dd5 +0.3 (upper limit: 7.0) a5 i/o pin voltage v io1 -0.3 to v dd5 +0.3 (upper limit: 7.0) a6 peak output current led output i ol1 (peak) 30 ma a7 other than led output i ol2 (peak) 20 a8 all pins i oh (peak) -10 a9 average output current *1 led output i ol1 (avg) 20 a10 other than led output i ol2 (avg) 15 a11 all pins i oh (avg) -5 a12 power dissipation mn101ef a6/a1 48pin tqfp p d1 300 mw a13 44pin qfp p d2 400 a14 mn101ef a5/a0 32pin ssop p d3 300 a15 32pin tqfp p d4 400 a16 operating ambient temperature t opr -40 to +85 ? c a17 storage temperature t stg -55 to +125 *1 applied to any 100 ms period. *2 connect at least one bypass capacitor of 0.1 ? f + 1.0 ? f or larger between vdd5 pin and gnd for the internal power voltage stabilization. *3 connect appropriate capacitor about 0.1 ? f + 1.0 ? f between vdd18 pin and vss pin, near the microcontroller according to the figure:1.5.1 shown below for the internal power supply stabilization. *4 the absolute maximum ratings are the limit values beyond which the lsi may be damaged. lsi vdd18 vss 0.1 f 1.0 f
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.5.2 operating conditions figure:1.5.2 ex ternal oscillator .. connect external capacitors suited for the used oscillator. the reference value denotes external capaci ty value based on our matching result. when crystal oscillator or ceramic oscillator is used, the oscillation frequency is changed depending on the value of capacito r. for external capacity value, please consult the oscillator manufacturer and perform matching tests enough for determining appropriate values. .. b. operating conditions v ss = 0 v ta = - 4 0 ? c to +85 ? c parameter symbol conditions rating unit min typ max power supply voltage *5 b1 power supply voltage v dd1 fs ?? 20 mhz 4.0 5.5 v b2 ram retention power supply voltage v dd8 during stop mode 2.2 5.5 operating speed *6 b3 instruction execution time fs t c1 v dd5 = 4.0 v to 5.5 v (when romhnd of handshake register is ?1?.) 0.05 ? s b4 t c2 v dd5 = 4.0 v to 5.5 v (when romhnd of handshake register is ?0?.) 0.10 *5 fs: machine clock frequency *6 tc1 to 2 : when the machine clock is selected from external high-speed oscillation, internal high-speed oscillation, or both t he oscil- lations multiplied by pll. external oscillat or figure:1.5.2 b5 frequency f hosc1 v dd5 is within the specified operating power supply voltage range. (refer to the ratings of b1 to b2 for the operating supply voltage range) 2.0 10 mhz b6 internal feedback resistor r f10 v dd5 = 5.0 v 980 k ? p25/osc1 r f10 f hosc1 p26/osc2 lsi c 12 c 11 feedback resistor is embedded.
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e figure:1.5.3 osc1 timing chart v dd5 = 4.0 v to 5.5 v v ss = 0 v ta = -40 ? c to +85 ? c parameter symbol conditions rating unit min typ max external clock input 1 osc1 (osc2 is unconnected) b7 clock frequency f hosc2 210.0 mhz b8 high-level pulse width *7 t wh1 figure:1.5.3 45 ns b9 low-level pulse width *7 t wl1 45 b10 rising time t wr1 figure:1.5.3 05.0 b11 falling time t wf1 05.0 *7 the clock duty ratio should be 45 % to 55 % t wh1 t wl1 0.8v dd5 t wf1 t wr1 0.2v dd5 t wc1
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.5.3 dc characteristics c. dc characteristics v ss = 0 v ta = - 4 0 ? c to +85 ? c parameter symbol conditions rating unit min typ max power supply current *8 c1 power supply current during operation i dd1 fosc=10 mhz [double-speed mode: fs=fosc] v dd5 =5 v (pll is not used) *9 514 ma c2 i dd2 fosc=10 mhz [multiplied by 2, divided by 2: fs=fosc] v dd5 =5 v (pll is used) *9 618 c3 i dd3 fosc=10 mhz [multiplied by 2: fs=20 mhz] v dd5 =5 v (pll is used) *9 920 c4 i dd4 frc=16 mhz [double-speed mode: fs=16 mhz] v dd5 =5 v (pll is used) *9 615 c5 power supply current during stop mode i dd5 v dd5 =5 v ta = -40 ? c to +85 ? c 145 245 ? a *8 measured without loading (pull-up and pull-down resistors are not connected.) to measure the power supply current during operation i dd1 to i dd4 ; 1. set all i/o pins to input mode, 2. set the cpu mode to ?normal mode?, 3. fix pin mmod to v ss level and input pins to v dd5 level 4. input the rectangular wave of 10 mhz(4 mhz) with amplitude of v dd5 and v ss , from pin osc1. to measure the power supply current during stop mode i dd5 ; 1. set the cpu mode to ?stop mode?, 2. fix pin mmod to v ss level and input pin to v dd5 level 3. open pin osc1. *9 when romhnd of handshake register is set to ?1?
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e v dd5 = 4.0 v to 5.5 v v ss = 0 v ta = -40 ? c to +85 ? c parameter symbol conditions rating unit min typ max input pin 1 atrst, mmod c10 input high voltage v ih1 0.8 v dd5 v dd5 v c11 input low voltage v il1 0 0.2 v dd5 c12 input leakage current i lk1 v in = 0 v to v dd5 2 ? a input pin 2 p27/nrst c13 input high voltage v ih2 0.8 v dd5 v dd5 v c14 input low voltage v il2 0 0.15 v dd5 c15 pull-up resistor r rh1 v dd5 =5 v, v in = v ss 10 50 100 k ? i/o pin 3 p00 to p07 c16 input high voltage 2 v ih3 0.54 v dd5 v dd5 v c17 input low voltage v il3 0 0.2 v dd5 c18 input leakage current i lk2 v in =0 v to v dd5 2 ? a c19 pull-up resistor r rh2 v dd5 =5 v, v in = v ss pull-up resistor on 10 50 100 k ? c20 output high voltage v oh1 v dd5 =5.0 v, i oh =-0.5 ma 4.5 v c21 output low voltage 1 v ol1 v dd5 =5.0 v, i ol =1.0 ma led output off 0.5 c22 output low voltage 2 v ol2 v dd5 =5.0 v, i ol =15.0 ma led output on 1.0 i/o pin 4 p20, p21 c23 input high voltage 2 v ih4 0.54 v dd5 v dd5 v c24 input low voltage v il4 0 0.2 v dd5 c25 input leakage current i lk3 v in =0 v to v dd5 2 ? a c26 pull-up resistor r rh3 v dd5 =5 v, v in =v ss pull-up resistor on 10 50 100 k ? c27 output high voltage v oh2 v dd5 =5.0 v, i oh =-0.5 ma 4.5 v c28 output low voltage v ol3 v dd5 =5.0 v, i ol =1.0 ma 0.5
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e v dd5 = 4.0 v to 5.5 v v ss = 0 v ta = - 4 0 ? c to +85 ? c parameter symbol conditions rating unit min typ max i/o pin 5 p22 to p24, p25 to p26 *10 p30 to p31, p32 to p36 c29 input high voltage v ih5 0.8 v dd5 v dd5 v c30 input low voltage v il5 0 0.2 v dd5 c31 input leakage current i lk4 v in =0 v to v dd5 2 ? a c32 pull-up resistor r rh4 v dd5 =5.0 v, v in =v ss pull-up resistor on 10 50 100 k ? c33 output high voltage v oh3 v dd5 =5.0 v, i oh =-0.5 ma 4.5 v c34 output low voltage v ol4 v dd5 =5.0 v, i ol =1.0 ma 0.5 i/o pin 6 pa0 to pa7 c35 input high voltage v ih6 0.8 v dd5 v dd5 v c36 input low voltage v il6 0 0.2 v dd5 c37 input leakage current i lk5 v in =0 v to v dd5 2 ? a c38 pull-up resistor r rh5 v dd5 =5.0 v, v in =v ss pull-up resistor on 10 50 100 k ? c39 output high voltage v oh4 v dd5 =5.0 v, i oh =-0.5 ma 4.5 v c40 output low voltage 1 v ol5 v dd5 =5.0 v, i ol =1.0 ma led output off 0.5 c41 output low voltage 2 v ol6 v dd5 =5.0 v, i ol =15.0 ma led output on 1.0 i/o pin 7 p40 to p45 c42 input high voltage v ih7 0.8 v dd5 v dd5 v c43 input low voltage v il7 0 0.2 v dd5 c44 input leakage current i lk5 v in =0 v to v dd5 2 ? a c45 pull-up resistor r rh6 v dd5 =5.0 v, v in =v ss pull-up resistor on 10 50 100 k ? c46 pull-down resistor r rl1 v dd5 =5.0 v, v in =v dd5 pull-down resistor on 10 50 100 c47 output high voltage v oh5 v dd5 =5.0 v, i oh =-0.5 ma 4.5 v c48 output low voltage v ol7 v dd5 =5.0 v, i ol =1.0 ma 0.5 input pin 8 dmod *11 c49 input high voltage v ih8 0.8 v dd5 v dd5 v c50 input low voltage v il8 0 0.2 v dd5 c51 pull-up resistor r rh8 v dd5 =5.0 v, v in =v ss pull-up resistor on 10 50 100 k ? *10 these are not used for oscillation pins. *11 only flash eeprom version, dmod pin co ntains an internal pull-up resistor. when using in-circuit emulator, connect pull- up resistor to dmod on the target board.
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.5.4 a/d converter characteristics .. even if a/d function is not used, v ref+ must be set between v dd5 and 4.0 v. .. d. a/d converter characteristics *12 v dd5 = 5.0 v v ss = 0 v ta = - 4 0 ? c to +85 ? c parameter symbol conditions rating unit min typ max d1 resolution 10 bits d2 non-linearity error 1 v dd5 =5.0 v, v ss =0 v v ref+ =5.0 v t ad =800 ns 3 lsb d3 differential non-linear- ity error 1 3 d4 zero transition voltage v dd5 =5.0 v, v ss =0 v v ref+ =5.0 v t ad =800 ns 10 30 mv d5 full-scale transition voltage 4970 4990 d6 a/d conversion time t ad =800 ns 12.93 ? s d7 sampling time t ad =800 ns 1.6 d8 reference voltage v ref+ v ref+ = v dd5 4.0 v dd5 v d9 analog input voltage v ss v ref+ d10 analog input leakage current channel off v adin =v ss to v dd5 2 ? a d11 reference voltage pin input leakage current ladder resistance off v ss ? v ref+ ? v dd5 5 d12 ladder resistance r ladd v dd5 =5.0 v 15 40 80 k ? *12 t ad is a/d conversion clock cycle. the specification values of d2 to d5 are guaranteed on the condition of v dd5 =v ref+ =5 v, v ss =0 v.
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.5.5 auto reset characteristics 1.5.6 internal high-spee d oscillation circuit 1.5.7 flash eeprom program conditions e. auto reset characteristics v dd5 = v rst to 5.5 v v ss = 0 v ta = -40 ? c to +85 ?c parameter symbol conditions rating unit min typ max power supply voltage e1 operating supply voltage v dd7 auto reset is used v rst 5.5 v power supply voltage e2 power detection level v rst1 at rising 4.10 4.30 4.50 v e3 power detection level v rst2 at falling 4.00 4.20 4.40 e4 supply voltage change rate ? t/? v2 m s / v f. internal high-speed oscillation circuit v dd5 = 4.0 v to 5.5 v v ss = 0 v parameter symbol conditions rating unit min typ max f1 internal high-speed oscil- lation circuit frequency f rc ta = - 4 0 ? c to +85 ?c1 6 m h z f2 temperature dependence of oscillation frequency *13 f rc3 ta = 2 5 ?c -5.0 5.0 % f rc4 ta = - 4 0 ? c to +85 ?c *13 the specification values described in g are for standard application. for special application (such as for automotive product) has different value. when using this lsi, consult our sales offices for the product specifications. g. flash eeprom program conditions *14 v dd5 = 4.0 v to 5.5 v v ss = 0 v ta = -40 ? c to +85 ? c parameter symbol conditions rating unit min typ max g1 voltage for rewriting v ddew 4.0 5.0 v g1 programming guarantee number of times e max 1000 time g2 data retention period t hold 20 year *14 the specification values described in g are for standard application. for special application (such as for automotive product) has different value. when using this lsi, consult our sales offices for the product specifications.
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e 1.6 package dimension ? package code: qfp044-p-1010funit: mm figure:1.6.1 44-pin qfp package dimension .. this package dimension is subject to change. before using this product, please obtain prod- uct specifications from our sales offices. ..
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e ? package code: tqfp048-p-0707bunit: mm figure:1.6.2 48-pin tqfp package dimension .. this package dimension is subject to change. before using this product, please obtain prod- uct specifications from our sales offices. ..
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e ? package code: ssop032-p-0300dunit: mm figure:1.6.3 32-pin ssop package dimension .. this package dimension is subject to change. before using this product, please obtain prod- uct specifications from our sales offices. ..
mn101efa6/a5/a1/a0 series 8-bit single-chip microcontroller publication date: november 2014 pubno. 216a6-012e ? package code: tqfp032-p-0707aunit: mm figure:1.6.4 32-pin tqfp package dimension .. this package dimension is subject to change. before using this product, please obtain prod- uct specifications from our sales offices. ..
request for your special attention and precautions in using the technical information and semiconductors described in this book (1) if any of the products or technical information described in this book is to be exported or provided to non-residents, the laws and regulations of the exporting country, especially, those with regard to security export control, must be observed. (2) the technical information described in this book is intended only to show the main characteristics and application circuit examples of the products. no license is granted in and to any intellectual property right or other right owned by panasonic corporation or any other company. therefore, no responsibility is assumed by our company as to the infringement upon any such right owned by any other company which may arise as a result of the use of technical information described in this book. (3) the products described in this book are intended to be used for general applications (such as office equipment, communications equipment, measuring instruments and household appliances), or for specific applications as expressly stated in this book. consult our sales staff in advance for information on the following applications: ? special applications (such as for airplanes, aerospace, automotive equipment, traffic signaling equipment, combustion equipment, life support systems and safety devices) in which exceptional quality and reliability are required, or if the failure or malfunction of the products may directly jeopardize life or harm the human body. it is to be understood that our company shall not be held responsible for any damage incurred as a result of or in connection with your using the products described in this book for any special application, unless our company agrees to your using the products in this book for any special application. (4) the products and product specifications described in this book are subject to change without notice for modification and/or im- provement. at the final stage of your design, purchasing, or use of the products, therefore, ask for the most up-to-date product standards in advance to make sure that the latest specifications satisfy your requirements. (5) when designing your equipment, comply with the range of absolute maximum rating and the guaranteed operating conditions (operating power supply voltage and operating environment etc.). especially, please be careful not to exceed the range of absolute maximum rating on the transient state, such as power-on, power-off and mode-switching. otherwise, we will not be liable for any defect which may arise later in your equipment. even when the products are used within the guaranteed values, take into the consideration of incidence of break down and failure mode, possible to occur to semiconductor products. measures on the systems such as redundant design, arresting the spread of fire or preventing glitch are recommended in order to prevent physical injury, fire, social damages, for example, by using the products. (6) comply with the instructions for use in order to prevent breakdown and characteristics change due to external factors (esd, eos, thermal stress and mechanical stress) at the time of handling, mounting or at customer's process. when using products for which damp-proof packing is required, satisfy the conditions, such as shelf life and the elapsed time since first opening the packages. (7) this book may be not reprinted or reproduced whether wholly or partially, without the prior written permission of our company. 20100202
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